1. Field of the Invention
This invention relates to an electronic device, a method of manufacturing the same, and a metal particle and an electroconductive paste which are suitable for the method of manufacturing.
2. Description of the Related Art
In the field of electronic devices including integrated circuits of a variety of scales, various semiconductor elements or chips thereof, there has been proposed a technique of obtaining a three-dimensional circuit arrangement, called TSV (Through-Silicon-Via), by which a large number of through-conductors are preliminarily provided to each of circuit boards, the circuit boards are stacked and bonded. The three-dimensional circuit arrangement, applied with the TSV technique, will have a large number of functions integrated into a small occupation area. In addition, it also becomes possible to accelerate the processing speed, since principal electric interconnects among the elements can be dramatically shortened. Japanese Patent No. 3869859 discloses a viahole structure indispensable for the TSV technique.
The viahole structure disclosed in Japanese Patent No. 3869859 not only contains a refractory metal, a low-melting-point metal or alloy, and a crosslinking agent, but also indispensably contains a binder and/or reactive monomer or polymer. In the solidified state within the viahole, an alloyed metal network coexists with a polymer network produced by crosslinkage of an organic component in an electroconductive adhesive.
According to the description of Japanese Patent No. 3869859, in the solidified state within the viahole, since the polymer network coexists with the alloyed metal network, so that the electroconductivity is lowered to a corresponding degree.
Another known problem intrinsic to diffusion bonding of metal relates to degradation in mechanical strength due to Kirkendall void. The Kirkendall void generates when atomic vacancies (lattice defects), caused by unbalanced mutual diffusion, accumulate without disappearing. For an exemplary case of Sn/Cu interface, since Sn diffusion is inferior to Cu diffusion, so that vacancies accumulate at the boundary between intermetallic compound and Cu, to form the Kirkendall void. The Kirkendall void grows up to a larger void or crack to degrade reliability and quality of the bonded part and the conductor, and to further degrade the mechanical strength, which may even result in separation, disconnection or the like. Japanese Patent No. 3869859 discloses nothing about the countermeasures.
Next, JP-A-2002-261105 discloses a technique by which electrodes of a semiconductor device and electrodes on a mounting board are connected using connection parts having a Cu6Sn5-containing CuSn compound and Cu balls, and also the Cu balls are mutually connected again with the CuSn compound. It may however be anticipated that the Kirkendall void would be produced at the Sn/Cu boundary, so far as the electrode and electrode, and, the Cu ball and Cu ball are mutually connected with the CuSn compound.
A similar problem would occur when the connection parts, which mutually connect the semiconductor chips, are formed on the surface of a wafer, in electric interconnect making use of through-conductor, electric interconnect making use of planar conductor pattern, and in electronic devices in the form of three-dimensional system-in-package (3D-SiP).